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WIZwiki-W7500

WIZnet 公司W7500

  • 32 位 ARM Cortex-M0
  • 128KB 閃存 / SRAM 48
  • 硬件 TCP / IP COE(WIZnet 的 TCP / IP 引擎)
  • 64TQFP(7×7毫米)
  • CMSIS-DAP
  • SWD Con.

WIZwiki-W7500 功能

  • Arduino 引腳兼容
  • ISP / SD插槽/ REG LED
  • 以太網 PHY

硬件:MII 接口

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* WZTOE信號

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  • 通過GPIO MDIO 

管理數據輸入/輸出(MDIO),也被稱為串行管理接口(SMI)或媒體獨立接口管理(MIIM),是用於以太網家族的IEEE 802.3標準的媒體獨立接口,或MII規定的串行總線。 信息產業部連接的媒體訪問控制(MAC)設備與以太網物理層(PHY)電路。

http://en.wikipedia.org/wiki/Management_Data_Input/Output

  • PB_14 – MDIO(@ IC + 101)
  • PB_15 – MDC(@ IC + 101

軟件:(將更新代碼的位置)

ioLibary :“互聯網卸載庫”WIZnet的芯片。 它包括驅動程序和應用協議。
$ W7500_FW 項目 Peripheral_Examples WZTOE ioLibrary
通過GPIO MDIO:它包括MDIO讀寫功能。
$ W7500_FW 項目 Peripheral_Examples WZTOE ioLibrary MDIO W7500x_miim.h
$ W7500_FW 項目 Peripheral_Examples WZTOE ioLibrary MDIO W7500x_miim.c

W7500 WZTOE(WIZnet的TCPIP引擎)驅動程序
$ W7500_FW 圖書館 W7500x_stdPeriph_Driver INC W7500x_WZTOE.h
$ W7500_FW 圖書館 W7500x_stdPeriph_Driver的 src W7500x_WZTOE.c

  • 如何訪問WZTOE
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寄存器

#define WZTOE_COMMON_REGISTER_BASEADDR (0x4100_0000)
#define WZTOE_SOCKET_REGISTER_BASEADDR(sock_num) (0x4101_0000 + (sock_num)<<18))

/* Write to wztoe common register with offset address of 3 */
offset_addr = 3;
*(volatile uint32_t *)(WZTOE_COMMON_REGISTER_BASEADDR + offset_addr) = 0x12;

/* Read to wztoe socket 3 register with offset address of 8 */
sock_num = 3;
offset_addr = 8;
val = *(volatile uint32_t *)(WZTOE_SOCKET_REGISTER_BASEADDR(sock_num) + offset_addr)
  • TX/RX 緩衝區
    Cortex-m0 能夠訪問由32位的地址. 然而,Sn_TX_WR(Socket n TX 寫指針寄存器) and Sn_RX_RD (Socket n RX 讀指針寄存器) 只是指針的低16位。因此,為了計算地址邊界,偏移地址應由 0xFFFF 掩蔽。
#define WZTOE_SOCKET_TXBUF_BASEADDR(sock_num) (0x4102_0000 + (sock_num)<<18))
#define WZTOE_SOCKET_RXBUF_BASEADDR(sock_num) (0x4103_0000 + (sock_num)<<18))

/* Write to wztoe TX buffer with offset address of 3 */
sock_num = 3;
offset_addr = 0x0001_0000;
*(volatile uint32_t *)(WZTOE_SOCKET_TXBUF_BASEADDR(sock_num) + (offset_addr&0xFFFF)) = 0x12;

/* Read to wztoe RX buffer with offset address of 8 */
sock_num = 2;
offset_addr = 8;
val = *(volatile uint32_t *)(WZTOE_SOCKET_RXBUF_BASEADDR(sock_num) + (offset_addr&0xFFFF)
  • TX/RX 緩衝區的 API
void WIZCHIP_READ_BUF (uint32_t BaseAddr, uint32_t ptr, uint8_t* pBuf, uint16_t len)
{
uint16_t i = 0;
WIZCHIP_CRITICAL_ENTER();

for(i = 0; i < len; i++)
pBuf[i] = *(volatile uint8_t *)(BaseAddr +((ptr+i)&0xFFFF));

WIZCHIP_CRITICAL_EXIT();
}

void WIZCHIP_WRITE_BUF(uint32_t BaseAddr, uint32_t ptr, uint8_t* pBuf, uint16_t len)
{
uint16_t i = 0;
WIZCHIP_CRITICAL_ENTER();

for( i=0; i<len; i++)
*(volatile uint8_t *)(BaseAddr + ((ptr+i)&0xFFFF)) = pBuf[i];

WIZCHIP_CRITICAL_EXIT();
}

void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len)
{
uint32_t ptr = 0;
uint32_t sn_tx_base = 0;

if(len == 0) return;
ptr = getSn_TX_WR(sn);
sn_tx_base = (TXMEM_BASE) | ((sn&0x7)<<18);
WIZCHIP_WRITE_BUF(sn_tx_base, ptr, wizdata, len);
ptr += len;
setSn_TX_WR(sn,ptr);
}

void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len)
{
uint32_t ptr = 0;
uint32_t sn_rx_base = 0;

if(len == 0) return;
ptr = getSn_RX_RD(sn);
sn_rx_base = (RXMEM_BASE) | ((sn&0x7)<<18); WIZCHIP_READ_BUF(sn_rx_base, ptr, wizdata, len); ptr += len; setSn_RX_RD(sn,ptr); } ``` ### MDIO via GPIO * Port Init. ```cpp /* Set GPIOs for MDIO and MDC */ GPIO_InitTypeDef GPIO_InitDef; GPIO_InitDef.GPIO_Pin = GPIO_Pin_MDC | GPIO_Pin_MDIO; GPIO_InitDef.GPIO_Mode = GPIO_Mode_OUT; GPIO_Init(GPIOx, &GPIO_InitDef); PAD_AFConfig(PAD_PB, GPIO_Pin_MDIO, PAD_AF1); PAD_AFConfig(PAD_PB, GPIO_Pin_MDC, PAD_AF1); ``` * MDIO APIs ```cpp uint32_t link(void) { return ((mdio_read(GPIOB, PHYREG_STATUS)>>SVAL)&0x01);
}

void set_link(SetLink_Type mode)
{
uint32_t val=0;
assert_param(IS_SETLINK_TYPE(mode));

if( mode == CNTL_AUTONEGO)
{
val = CNTL_AUTONEGO;
}
else
{
val = (mode & (CNTL_SPEED|CNTL_DUPLEX));
}

mdio_write(GPIOB, PHYREG_CONTROL, val);

}
  • MDIO 讀/寫功能
void output_MDIO(GPIO_TypeDef* GPIOx, uint32_t val, uint32_t n)
{
for(val <<= (32-n); n; val<<=1, n--)
{
if(val & 0x80000000)
GPIO_SetBits(GPIOx, MDIO);
else
GPIO_ResetBits(GPIOx, MDIO);

delay(1);
GPIO_SetBits(GPIOx, MDC);
delay(1);
GPIO_ResetBits(GPIOx, MDC);
}
}

uint32_t input_MDIO( GPIO_TypeDef* GPIOx )
{
uint32_t i, val=0;
for(i=0; i<16; i++)
{
val <<=1;
GPIO_SetBits(GPIOx, MDC);
delay(1);
GPIO_ResetBits(GPIOx, MDC);
delay(1);
val |= GPIO_ReadInputDataBit(GPIOx, MDIO);
}
return (val);
}